Prof. Haris Volos

Prof. Haris Volos

Prof. Haris Volos
Head of the COAST Research Group
volos.haris@ucy.ac.cy
haris-volos-57b4b527
0000-0002-3777-0012
hvolos
Q4Sn28AAAAAJ

Department of Computer Science
Office FST 01 115
1 Panepistimou Avenue
Aglantzia, Nicosia 2109, Cyprus

I am an Assistant Professor and a Marie Sklodowska-Curie Fellow at the University of Cyprus in the Department of Computer Science.

My research focuses on computer architecture and operating systems, with a particular emphasis on the interaction between hardware architecture and systems software, data-centric computing, and heterogeneous memory systems.

I lead the COAST research group that investigates the interaction of hardware architecture and systems software.

Previously, I worked as a software engineer at Google, Mountain View, USA (2018-2019) and as a research engineer at Hewlett Packard Labs, Palo Alto, USA (2013-2018).

I received my Ph.D. (2012) and M.Sc. (2007) in Computer Sciences from the University of Wisconsin-Madison. I obtained my engineering degree in Electrical and Computer Engineering (2005) from the National Technical University of Athens (Metsovion).

Publications

  1. IISWC
    Taming Performance Variability caused by Client-Side Hardware Configuration
    Georgia Antoniou, Haris Volos, and Yiannakis Sazeides
    In IISWC ’24: Proceedings of the 2024 IEEE International Symposium on Workload Characterization 2024
  2. TACO
    Agile C-states: A Core C-state Architecture for Latency Critical Applications Optimizing both Transition and Cold-Start Latency
    Georgia Antoniou, Davide B. Bartolini, Haris Volos, Marios Kleanthous, Zhe Wang, Kleovoulos Kalaitzidis, Tom Rollet, Ziwei Li, Onur Mutlu, Yiannakis Sazeides, and Jawad Haj-Yahya
    ACM Transactions on Computer Architecture and Code Optimization 2024
  3. MICRO
    AgileWatts: An Energy-Efficient CPU Core Idle-State Architecture for Latency-Sensitive Server Applications
    Jawad Haj-Yahya, Haris Volos, Davide B. Bartolini, Georgia Antoniou, Jeremie S. Kim, Zhe Wang, Kleovoulos Kalaitzidis, Tom Rollet, Zhirui Chen, Ye Geng, Onur Mutlu, and Yiannakis Sazeides
    In MICRO ’22: Proceedings of the 55th IEEE/ACM International Symposium on Microarchitecture 2022
  4. MICRO
    AgilePkgC: An Agile System Idle State Architecture for Energy Proportional Datacenter Servers
    Georgia Antoniou, Haris Volos, Davide B. Bartolini, Tom Rollet, Yiannakis Sazeides, and Jawad Haj-Yahya
    In MICRO ’22: Proceedings of the 55th IEEE/ACM International Symposium on Microarchitecture 2022
  5. NVMW
    Persistent Scripting
    Zi Fan Tan, Jianan Li, Haris Volos, and Terence Kelly
    In NVMW ’22: 13th Annual Non-Volatile Memories Workshop 2022
  6. ACM Queue
    Persistent Memory Allocation: Leverage to move a world of software
    Terence Kelly, Zi Fan Tan, Jianan Li, and Haris Volos
    ACM Queue magazine 2022
  7. TOCS
    Unified Holistic Memory Management Supporting Multiple Big Data Processing Frameworks over Hybrid Memories
    Lei Chen, Jiacheng Zhao, Chenxi Wang, Ting Cao, John Zigman, Haris Volos, Onur Mutlu, Fang Lv, Xiaobing Feng, Guoqing Harry Xu, and Huimin Cui
    ACM Transactions on Computer Systems 2022
  8. CAL
    The Case for Replication-Aware Memory-Error Protection in Disaggregated Memory
    Volos, Haris
    IEEE Computer Architecture Letters 2021
  9. WORDS
    MODC: Resilience for disaggregated memory architectures using task-based programming
    Kimberly Keeton, Sharad Singhal, Haris Volos, Ramesh Chandra Chaurasiya Yupu Zhang, Clarete Riana Crasta, Sherin T George, Nagaraju K N, Mashood Abdulla K, Kavitha Natarajan, and Sanish Suresh Porno Shome
    In WORDS ’21: 2nd Workshop On Resource Disaggregation and Serverless 2021
  10. PLDI
    Panthera: Holistic Memory Management for Big Data Processing over Hybrid Memories
    Chenxi Wang, Huimin Cui, Ting Cao, John Zigman, Haris Volos, Onur Mutlu, Fang Lv, Xiaobing Feng, and Guoqing Harry Xu
    In PLDI ’19: Proceedings of the 40th ACM SIGPLAN Conference on Programming Language Design and Implementation 2019
  11. ASPLOS
    An analysis of persistent memory use with WHISPER
    Sanketh Nalli, Swapnil Haria, Mark D. Hill, Michael M. Swift, Haris Volos, and Kimberly Keeton
    In ASPLOS ’17: Proceedings of the 22nd International Conference on Architectural Support for Programming Languages and Operating Systems 2017
  12. NVMW
    Hands-off persistence system (HOPS)
    Swapnil Haria, Sanketh Nalli, Michael M. Swift, Mark D. Hill, Haris Volos, and Kimberly Keeton
    In NVMW ’17: 8th Annual Non-Volatile Memories Workshop 2017
  13. NVMW
    How Applications Use Persistent Memory
    Sanketh Nalli, Swapnil Haria, Michael M. Swift, Mark D. Hill, Haris Volos, and Kimberly Keeton
    In NVMW ’17: 8th Annual Non-Volatile Memories Workshop 2017
  14. ICPE
    Interconnect emulator for aiding performance analysis of distributed memory applications
    Qi Wang, Ludmila Cherkasova, Jun Li, and Haris Volos
    In ICPE ’16: Proceedings of the 7th ACM/SPEC on International Conference on Performance Engineering 2016
  15. MASCOTS
    InterSense: Interconnect performance emulator for future scale-out distributed memory applications
    Qi Wang, Ludmila Cherkasova, Jun Li, and Haris Volos
    In MASCOTS ’15: Proceedings of the 2015 IEEE 23rd International Symposium on Modeling, Analysis, and Simulation of Computer and Telecommunication Systems 2015
  16. ICPE
    A framework for emulating non-volatile memory systems with different performance characteristics
    Dipanjan Sengupta, Qi Wang, Haris Volos, Ludmila Cherkasova, Jun Li, Guilherme Magalhaes, and Karsten Schwan
    In ICPE ’15: Proceedings of the 6th ACM/SPEC on International Conference on Performance Engineering 2015
  17. MIDDLEWARE
    Quartz: A Lightweight performance emulator for persistent memory software
    Haris Volos, Guilherme Magalhaes, Ludmila Cherkasova, and Jun Li
    In Middleware ’15: Proceedings of the 16th International Middleware Conference 2015
  18. EuroSys
    Aerie: Flexible file-system interfaces to storage-class memory
    Haris Volos, Sanketh Nalli, Sankarlingam Panneerselvam, Venkatanathan Varadarajan, Prashant Saxena, and Michael M. Swift
    In EuroSys ’14: Proceedings of the 9th ACM European conference on Computer systems 2014
  19. VLDB
    In-memory performance for big data
    Goetz Graefe, Haris Volos, Hideaki Kimura, Harumi Kuno, Joseph Tucek, Mark Lillibridge, and Alistair Veitch
    PVLDB: Proceedings of the Very Large Data Bases Endowment 2014
  20. APSys
    Storage-class memory needs flexible interfaces
    Haris Volos, Sankaralingam Panneerselvam, Sanketh Nalli, and Michael M. Swift
    In APSys ’13: Proceedings of the 4th Asia-Pacific Workshop on Systems 2013
  21. ASPLOS
    Applying transactional memory to concurrency bugs
    Haris Volos, Andres Jaan Tack, Michael M. Swift, and Shan Lu
    In ASPLOS ’12: Proceedings of the 17th International Conference on Architectural Support for Programming Languages and Operating Systems 2012
  22. ASPLOS
    Mnemosyne: Lightweight persistent memory
    Haris Volos, Andres Jaan Tack, and Michael M. Swift
    In ASPLOS ’11: Proceedings of the 16th International Conference on Architectural Support for Programming Languages and Operating Systems 2011
  23. NVMW
    Storage systems for storage-class memory
    Haris Volos, and Michael M. Swift
    In NVMW ’11: 2nd Annual Non-Volatile Memories Workshop 2011
  24. ECOOP
    NePaLTM: Design and implementation of nested parallelism for transactional memory systems
    Haris Volos, Adam Welc, Ali-Reza Adl-Tabatabai, Tatiana Shpeisman, Xinmin Tian, and Ravi Narayanaswamy
    In ECOOP ’09: Proceedings of the 23rd European Conference on Object-Oriented Programming 2009
  25. EuroSys
    xCalls: Safe I/O in memory transactions
    Haris Volos, Andres Jaan Tack, Neelam Goyal, Michael M. Swift, and Adam Welc
    In EuroSys ’09: Proceedings of the 4th ACM European conference on Computer Systems 2009
  26. IEEE Micro
    Performance Pathologies in Hardware Transactional Memory
    Jayaram Bobba, Kevin E. Moore, Haris Volos, Luke Yen, Mark D. Hill, Michael M. Swift, and David A. Wood
    IEEE Micro 2008
  27. TRANSACT
    Pathological interaction of locks with transactional memory
    Haris Volos, Neelam Goyal, and Michael M. Swift
    In TRANSACT ’08: 3rd ACM SIGPLAN Workshop on Transactional Computing 2008
  28. TRANSACT
    OS Support for virtualizing hardware transactional memory
    Michael M. Swift, Haris Volos, Neelam Goyal, Luke Yen, Mark D. Hill, and David A. Wood
    In TRANSACT ’08: 3rd ACM SIGPLAN Workshop on Transactional Computing 2008
  29. ISCA
    Performance pathologies in hardware transactional memory
    Jayaram Bobba, Kevin E. Moore, Haris Volos, Luke Yen, Mark D. Hill, Michael M. Swift, and David A. Wood
    In ISCA ’07: Proceedings of the 34th International Symposium on Computer Architecture 2007
  30. HPCA
    LogTM-SE: Decoupling hardware transactional memory from caches
    Luke Yen, Jayaram Bobba, Michael R. Marty, Kevin E. Moore, Haris Volos, Mark D. Hill, Michael M. Swift, and David A. Wood
    In HPCA ’07: Proceedings of the 13th International Symposium on High Performance Computer Architecture 2007